| Apr 2003 | Delta-Sigma ADC |
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Alex Paikin , National Semiconductor This paper adds a little more details to how a Sigma-Delta ADC works. For a general ADC paper refer to A/D converters.
In the schematic above the input analog voltage drives an integrator, whose output is compared with a ground voltage level by a comparator. D-latch controls a switch turning on/off a reference voltage, they both are composing a 1-bit DAC. As the input voltage increases or decreases, the comparator turns on and off the reference voltage, that is subtracted from the input signal, aiming to maintain zero on the output of the integrator. The counter C1 keeps track of clock periods, while counter C2 counts the number of pulses when the switch is closed. Suppose the volume of counter C1 is 1000. By the time it gets the final count, the number in counter C2 is proportional to the average level of the input signal during the time of 1000 clock pulses. Now the name delta-sigma is making a little more sense: delta (the difference) refers to delta modulation,
the principle of coding not the whole input value, but only the difference between the current signal sample
and the feedback signal, corresponding to the previous sample. Obviously, less bits are required to code only the difference
in the amplitudes.
Technical papers often refer to sigma-delta converter as over-sampling. Traditional converter takes a sample of
the input signal and performs a complete conversion with it. Delta-sigma converter is averaging multiple samples.
References:
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