Q:I swapped transistors in CMOS inverter (put n-transistor at the top and p-transistor at the bottom).
Can I use this circuit as a noninverting buffer?
 
 

Discussion :

> > Dear Hitequest,
First off, I'd like to thank you  for hosting an excellent website
which has been very useful to me. Great work! I have a question about
 the solution about the noninverting buffer.


I didn't quite understand this because I thought the source and drain were
 interchangeable depending on which one is at a higher potential.In the case of
 NMOSFET, if one of the 2 terminals is tied to VDD,then, doesn't that become the
 drain since it is at a higher potential? I'd really appreciate if you could
 enlighten me on this whenever you get time.Thank you and have a great
 day:-)

Thanks,Sriram
---------------------------
I still am not clear with one thing.Perhaps,I should rephrase my question:
Consider the swapped circuit with NMOS on top and PMOS below.One terminal of 
the NMOS is connected to Vdd(this becomes the drain due to its higher 
potential).The gate is connected to Vdd as well.So shouldn't it act like a pass 
transistor and conduct current? there is a voltage difference between source 
and drain since drain is connected to Vdd,right? 

I'm really curious to know the answer.Thanks for your time and have a great day:-) Thanks Sriram --------------------------- High input level is not enough to open NMOS transistor, because it's source has the same high potential (Vdd) as a gate. By the same reason low level will not open p-transistor. Does it make sense? Take care. alex --------------------------- > Hi Alex, > Once again,thanks for responding immediately.I don't know what I'm missing but > how is the Vs of the NMOS equal to vdd/2.I thought the source of the NMOS is > basically the output node of the new arrangement and its source voltage is > indeterminate at the beginning.Look forward to your reply.I appreciate your > help. > > Cheers > Sriram --------------------------- hello Sriram, if both transistors are closed,the output is close to tristate, which is Vdd/2 (think about these transistors like of 2 large value resistors).If you apply "1" to n_mos transistor, it is trying to open , and it's Vs would be close to Vdd. But it can't happen, because the Vg is not high enough. alex